peripheral processor
英 [pəˈrɪfərəl ˈprəʊsesə(r)]
美 [pəˈrɪfərəl ˈprɑːsesər]
网络 周边处理器; 外围处理机
双语例句
- A table or diagram containing the name and address range of each peripheral addressable by the processor within the I/ O space.
一张包含每个外设的名字和地址的表格或图表，可由处理器在I/O空间中设定地址。 - This allows efficient access to peripheral registers and flags located in SRAM memory without the need for a full Boolean processor.
这样就可以有效地对设备寄存器和位于SRAM中的某些标志位提供存取接口，而不再需要完整的布尔逻辑运算过程。 - This allows the hard ware for each peripheral processor to be identical, greatly increasing flexibility and expandability of the system.
这使得每个外围处理单元的硬件都可以相同，大大提高了系统的机动性和扩充能力。 - Peripheral Component Interconnect. A standard for connecting peripherals to processors that is processor independent.
周边元件扩展接口。处理器独立的连接周边元件的标准。 - The peripheral may reside within the same chip as the processor, in which case it is called an internal peripheral.
外设经常和处理器在一片芯片上，在这种情况下，它被称为集成外设。 - An asynchronous electrical signal from a peripheral to the processor.
一个从外设到处理器的异步电信号。 - It has flexible peripheral interfaces, so can be used as an independent processor in the board-level application or as a core in the ASIC design.
制定了比较灵活的外围接口，使之从整体上既可以作为独立的处理器供处理器板级应用，又可以作为嵌入式内核供ASIC设计使用。 - This paper will try to discuss all kinds of hardware platforms realizing the fuzzy protective relay, in which CPLD/ FPGA act as peripheral fetch chip, special digital processor and system-on-chip mode. This paper will also propose a novel mode which CPLD controls DSP.
探讨了CPLD/FPGA与DSP构成的各种硬件方案在模糊保护中的应用，包括DSP的外围芯片式、专用信号处理芯片式及片上系统式，并提出多DSP并行处理式的设计方案。 - After the serial peripheral interface ( SPI) was used to implement communication of Arm processor with CAN controller. CAN-Bus driver program and application program in Arm-Linux embedded system were designed, and the graphical user interface ( GUI) based on Arm-Linux was developed.
Arm处理器以同步外设接口（SPI）方式与CAN控制器相通信，开发了Arm-Linux嵌入式系统下的CAN-Bus驱动及应用程序，且设计了嵌入式环境下图形界面系统（GUI）。 - On working Most of the software runs on the peripheral processor.
软件大部分在外围机上工作。 - Design of Peripheral Interface Based on FPGA and ARM Core Processor
基于FPGA和ARM核处理器的外设接口 - The peripheral software of the EDM system, which is implemented in several user processes, will run only when the NC kernel releases the processor.
数控系统的外围软件由多个用户进程实现，仅在NC核放弃处理机时运行。 - For the problem of more than 200 connections from I/ O to main processor, we apply two CPLD chips as the expansion to form the implement circuit of process, which play as the peripheral device for the main processor.
为了解决200多路I/O接入主处理器的问题，采用了两片CPLD进行外围扩展构成工艺执行电路，作为主处理器的外围设备。 - This interface can be used to data exchange with peripheral apparatus for processor and controller which have not SPI interface function.
通过该方法的介绍，使得那些没有SPI接口功能的处理器和控制器能够扩展SPI接口，以便同外部设备进行数据交换。 - The design shows that, FPGA chips can not only be used as glue logic functions, control and connect peripheral modules, but also can replace the DSP processor to achieve image processing algorithm.
通过该系统的设计表明，FPGA芯片不仅可以起到胶合逻辑的功能，对外围模块进行控制和连接，而且可以取代DSP（数字信号处理器）处理器完成图像处理算法的实现。 - Computer interface technology is the key technology of It plays a communication peripheral device with the central processor bridge.
而接口技术在其中起着沟通外围设备与中央处理器的桥梁作用。 - This paper designs the peripheral circuits after choosing a good processor.
在选择好处理器后，设计了相应的外围电路。 - The host processor is responsible for task scheduling, ultra-sound barrier, sensor and peripheral circuit, the slave processor is responsible for receiving data from the host processor and make motor realize the robot tasks.
主处理器主要负责任务调度、超声波避障、传感器及外围电路，从处理器负责接收主处理器传来的数据请求，控制电机做出适当的动作，实现机器人的作业任务。 - PCI bus is not restricted in the processor, which provides a high-speed access between the peripheral and the processor and greatly improves data throughput.
PCI总线不受制于处理器，并为处理器和高速外设之间提供了一条通道，大大提高了数据吞吐量。